Field of the Invention
The present invention relates to a module board in which multiple electronic components are mounted on one face of a substrate and the multiple electronic components are sealed with an insulating resin. In particular, the present invention relates to a module board in which multiple columnar connection terminals are arranged not only on a peripheral area of a substrate but also between the multiple electronic components that are mounted.
Description of the Related Art
Many circuit boards have hitherto been developed in which multiple columnar posts are formed on the peripheral areas of substrates and the columnar posts are exposed from the top face of an insulating resin with which inner connection electrodes are sealed to use the columnar posts as outer electrodes. For example, Patent Document 1 discloses a method of manufacturing a semiconductor integrated circuit device in which columnar conductive posts are arranged on a peripheral area of a wiring substrate on which a semiconductor chip is installed and a part of the conductive posts is exposed from a resin sealing portion with which the wiring substrate is sealed to form outer electrodes.
Patent Document 2 discloses a method of manufacturing a semiconductor apparatus in which multiple columnar or rod-shaped internal connection electrodes are fixed on a peripheral area of an organic substrate having circuit elements arranged thereon so that a connecting plate turns up, the internal connection electrodes are sealed with resin so that the connecting plate is covered with the resin, the surfaces of the internal connection electrodes that are sealed with the resin are abraded or ground at least until the connecting plate is abraded off for flattening, and the internal connection electrodes are exposed to use the internal connection electrodes that are exposed as outer connection electrodes.
Patent Document 1: Japanese Unexamined Patent Application Publication No. 2007-287762
Patent Document 2: Japanese Patent No. 3960479
Patent Document 3: Japanese Unexamined Patent Application Publication No. 2004-071961